CTU
IEEE
PESW 2017
The 5th Prague Embedded Systems Workshop
June 29-30, 2017
Roztoky u Prahy, Czech Republic


PESW 2017 Program

Thursday, June 29 9:00 - 10:00 Registration
10:00 Opening
10:10 - 11:50 Session 1 - Design and applications: Making the devices see and hear
Chair: Tomáš Vaňát
The Vehicle Control System Based on Images From an External Camera (Dariusz Rutkowski and Piotr Mróz)
Hyperspectral Image Processing with LWIR Hyperspectral Camera (Jiří Čech and Martin Rozkovec)
Multi-rotor Controlling System using Voice Commands (Sagy Harpaz and Gabi Shafat)
Musical Notes Extraction (Yishai Cohen, Revital Hollander and Gabi Shafat)
11:50 - 12:50 Lunch
12:50 - 13:50 Keynote: Traffic Mining, feel the packets, be the packets (Stefan Burschka)
Chair: Tomáš Čejka
13:50 - 14:00 Coffee break
14:00 - 15:40 Session 2 - Networks and network security: Reputation and Incident Handling
Chair: Tomáš Čejka
Incident handling in ISP networks (Monika Kdanova)
Towards Evaluating Reputation of IP Addresses (Václav Bartoš)
Security Tools as a Service (Petr Velan)
DDoS mitigation at 100G (Martin Žádník)
15:40 - 16:00 Coffee break
16:00 - 16:50 Session 3 - Networks and network security: Anomaly detection
Chair: Václav Bartoš
Gateway for IoT security (Tomáš Čejka and Marek Švepeš)
Detection of SIP Scans and Bruteforce Attacks (Tomáš Jánský, Tomáš Čejka and Václav Bartoš)
16:50 - 17:40 Session 4 - Verification and testing: Test generation
Chair: Robert Hülle
Random Test Stimuli Generation Based on a Probabilistic Grammar (Ondřej Čekan and Zdeněk Kotásek)
Qubit Test Synthesis for the Black Box Functionality (Vladimir Hahanov, Eugenia Litvinova, Igor Iemelianov, Svetlana Chumachenko and Mykhailo Liubarskyi)
17:40 - ??? Social Event, Dinner
Friday, June 30 9:30 - 10:00 Keynote: Cyber-physical systems – History, Challenges and Expectations (Ilya Levin)
Chair: Petr Fišer
10:00 - 11:15 Session 5 - Networks and network security: Algorithms and design
Chair: Václav Bartoš
Asymmetric Low-power FHSS Algorithm (Tomáš Jakubík and Jiří Jeníček)
Mapping of P4 Match Action Tables to FPGA (Michal Kekely and Jan Kořenek)
Classification of Traffic Participants on an Embedded Radar Sensor (Alexander Prinz, Peter Johann Raab and Sebastian Marsch)
11:15 - 11:45 Coffee break & student posters: time to hang
11:45 - 13:00 Session 6 - Design and applications: From SoCs, through neural networks, to memristors
Chair: Michal Kekely
Acquisition of Modern GNSS Signals in SoC ZYNQ with its Limited Computational Resources in Frequency Domain (Jiří Svatoň, František Vejražka, Pavel Kubalík and Jan Schmidt)
Approximation accuracy of different FPNN types (Martin Krčma and Zdeněk Kotásek)
Formal Design Space Exploration for Memristor-based Crossbar Architecture (Marcello Traiola, Mario Barbareschi and Alberto Bosio)
13:00 - 14:00 Lunch
14:00 - 14:30 Time for our precious sponsors (NXP - Matěj Pácha)
14:30 - 15:15 Keynote: IoT Security and Trust Challenges (Giorgio Di Natale)
Chair: Nartin Novotný
15:15 - 16:15 Coffee break & student posters: time to show
16:15 - 17:30 Session 7 - Verification & testing: What hasn't been said yet
Chair: Stanislav Jeřábek
A Basic Approach to Fault Tolerance of Data Paths of HLS-synthesized Systems and its Evaluation (Jakub Lojda and Zdeněk Kotásek)
The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs (Jakub Podivínský and Zdeněk Kotásek)
Qubit Deductive Fault Simulation of Black Box Functionalities (Vladimir Hahanov, Eugenia Litvinova, Ivan Hahanov, Anastasia Khakhanova, Svetlana Chumachenko and Mykhailo Liubarskyi)
17:30 Closing
Saturday, July 1 Sightseeing tour